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* fw: move sdram downloader test data to assemblyHEADmainH. Peter Anvin80 min.10-5716/+5727
* sdcard: mount disk images, Makefile/ld: infrastructure for dram dataH. Peter Anvin96 min.12-3846/+5855
* abcbus: fix missing clock to ABC-bus synchronizerH. Peter Anvin96 min.2-1/+88
* fw: use -malign-data=naturalH. Peter Anvin3 days6-525/+510
* fw: allow gcc to optimize memset, memcpy, and memmoveH. Peter Anvin3 days6-2/+7
* fw: faster memset()H. Peter Anvin3 days9-3767/+3873
* Use waitirq rather than suspending a memory transaction for SD cardH. Peter Anvin3 days19-3808/+4086
* Add to waitirq and "andmask" and an "ormask".H. Peter Anvin3 days2-10/+16
* rtc: print the decoded RTC time to the console and update systimeH. Peter Anvin3 days7-2826/+2989
* abcbus: move abcbus to separate module; add I/O status registerH. Peter Anvin3 days9-374/+564
* Add I/O interface to the ABC bus, using SDRAM DMAH. Peter Anvin4 days9-3653/+3821
* fw: drop RTC I2C frequency to 100 kHzH. Peter Anvin4 days2-2789/+2785
* Add i2c unitH. Peter Anvin4 days16-3531/+3932
* iodev: move one-register "devices" into a common "sys"; add "abc" deviceH. Peter Anvin5 days11-3504/+3532
* Detect the presence of an ABC-bus by looking for a clock signalH. Peter Anvin5 days8-3413/+3477
* fpga: parameterize the rtc_32khz workaroundH. Peter Anvin6 days7-16/+30
* sdram: fix initialization sequence againH. Peter Anvin6 days1-12/+14
* max80: change esp_ctr debug signal to 4 HzH. Peter Anvin6 days5-1/+1
* SDRAM access from the ABC-busH. Peter Anvin7 days10-3472/+3828
* hack: binary counter on ESP pins to test connectivityH. Peter Anvin7 days5-32/+48
* Add extended devices (xdevs) that require > 128 bytesH. Peter Anvin8 days12-65/+129
* sdcard: run in slow mode (400 kHz during initialization)H. Peter Anvin9 days6-2876/+2874
* sdcard: generalize the IP, instantiate for ESP32 SPI channel tooH. Peter Anvin9 days11-3523/+3643
* iodev: centralize definitions and auto-generate boiler plate codeH. Peter Anvin10 days23-3748/+3911
* fw: allow optimization if IRQ_VECTORS < 32H. Peter Anvin10 days3-4/+21
* fw: make sure to clear the timer IRQ counter on init...H. Peter Anvin10 days6-3480/+3491
* fw: force instructions in irqasm.S to be alignedH. Peter Anvin10 days6-3506/+3514
* fw: prevent invalid linker relaxation in irqasm.SH. Peter Anvin10 days6-1/+6
* fw: move .sdata/.sbss into the zero pageH. Peter Anvin10 days4-3564/+3584
* fw: set gp for the IRQ bank toonewqregH. Peter Anvin10 days7-3283/+3303
* Add irqasm.S... still no interrupts, but no crashes either...H. Peter Anvin10 days6-3458/+3512
* picorv32: revamp the Q registers to be a full bank switchH. Peter Anvin10 days12-3698/+3697
* Switch to aggressive optimization to improve timingH. Peter Anvin12 days5-1/+1
* Timing improvements: wait state for iodev, fix handling of sr_clkH. Peter Anvin12 days8-18/+31
* fw: now working interrupt handling, periodic timer flashing LEDsH. Peter Anvin12 days11-3248/+3525
* fpga/max80: 32 kHz RTC clock isn't working, workaroundH. Peter Anvin12 days1-7/+57
* fpga/sysclock: fix off-by-one in periodic pulse generationH. Peter Anvin12 days1-19/+26
* fpga: disable pull resistors for SPI to flash chipH. Peter Anvin12 days1-3/+3
* picorv32: fix aliasing of mret = retirqH. Peter Anvin12 days1-8/+10
* Update FPGA generated filesH. Peter Anvin13 days4-0/+0
* fw: add interrupt support; use a linker scriptH. Peter Anvin13 days13-3303/+3553
* picorv32: have maskirq take a control mask; let mret = retirqH. Peter Anvin13 days1-2/+8
* sdcard: works now! (At least reading)H. Peter Anvin13 days6-2135/+3287
* sdcard: fix switching to high speed modeH. Peter Anvin13 days6-1665/+1681
* sdcard: now talking to the SD card; driver fixes still neededH. Peter Anvin13 days10-2367/+2251
* Add sdcard and sysclock units; reshuffle address mapH. Peter Anvin13 days24-1325/+3962
* Add ELM-Chan FatFS 0.14b explicitlyH. Peter Anvin2021-10-0412-5/+24182
* Remove fatfs as a submodule. It is small and needs edits.H. Peter Anvin2021-10-043-5/+13
* Add sdcard unit; currently SPI basedH. Peter Anvin2021-10-049-75/+343
* spirom: fix data corruption on reader stallH. Peter Anvin2021-10-045-12/+14