Commit message (Expand)AuthorAgeFilesLines
* swpll: break the NCO counter into 3-bit(!) chunks; parameterizeHEADmasterH. Peter Anvin2019-10-121-47/+80
* Even better parameters; proper ramstyle annotationsH. Peter Anvin2019-10-121-4/+8
* swpll: works reasonalby well now. Still some very small glitches...H. Peter Anvin2019-10-1214-91/+533
* scanconv: clean up; 72 MHz PLL-synchronized clock for usH. Peter Anvin2019-10-091-104/+33
* swpll: actually extract the hsync signals from the composite syncH. Peter Anvin2019-10-092-16/+61
* vid_master_clk: fix commentH. Peter Anvin2019-10-091-1/+1
* abc806addon.sdc: remove obsolete commentH. Peter Anvin2019-10-091-1/+0
* More timing optimizations. Now pass even hold constraints.H. Peter Anvin2019-10-093-14/+19
* Now meets timing with a 360 MHz video master clock!H. Peter Anvin2019-10-097-127/+256
* Implement Altera's recommendation of async-assert sync-deassert resetH. Peter Anvin2019-10-045-22/+30
* Implement a software PLL to generate a synchronized clock for videoH. Peter Anvin2019-10-0210-63/+307
* Remove greybox file, add flash conversion recipeH. Peter Anvin2019-09-272-26/+32
* Better picture with 216 MHz master clockH. Peter Anvin2019-09-262-7/+7
* NCO definitely has a better picture now.H. Peter Anvin2019-09-262-20/+28
* Try to more precisely match the horizontal scan frequencyH. Peter Anvin2019-09-268-84/+167
* Initial version; good enough to give a somewhat shaky output pictureH. Peter Anvin2019-09-2620-0/+2106