Commit message (Expand) | Author | Age | Files | Lines | |
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* | swpll: works reasonalby well now. Still some very small glitches... | H. Peter Anvin | 2019-10-12 | 1 | -5/+7 |
* | abc806addon.sdc: remove obsolete comment | H. Peter Anvin | 2019-10-09 | 1 | -1/+0 |
* | More timing optimizations. Now pass even hold constraints. | H. Peter Anvin | 2019-10-09 | 1 | -8/+11 |
* | Now meets timing with a 360 MHz video master clock! | H. Peter Anvin | 2019-10-09 | 1 | -7/+9 |
* | Implement a software PLL to generate a synchronized clock for video | H. Peter Anvin | 2019-10-02 | 1 | -0/+21 |
* | Initial version; good enough to give a somewhat shaky output picture | H. Peter Anvin | 2019-09-26 | 1 | -0/+17 |